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Solar PVEstoniaEIR-0016

Recurrent inverter failures at Kopli Solar Power Plant, Estonia

2024Published 1 May 2026Responsible editor: Chief Editor

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Where
Kopli Solar Power Plant in Kopli, Estonia
What
Recurrent destructive inverter failures
Cause
Negative DC input terminal short-circuit conditions
Outcome
Destruction of the inverters

A peer-reviewed engineering investigation published in 2024 documents recurrent destructive inverter failures at Kopli Solar Power Plant, a utility-scale solar plant in Kopli, Estonia. Multiple inverter failure events were captured through field monitoring and waveform analysis. The investigators then carried out controlled laboratory experiments to reproduce the fault scenarios identified in the field, and combined both lines of evidence to identify the failure mechanism. The case is documented with explicit fault signatures, telemetry and reproducible laboratory validation, which is uncommon for solar inverter failures.

According to the published investigation, the failures originated on the DC side of the inverters, specifically negative DC input terminal short-circuit conditions. The investigation identified three contributing factors that allowed the initial faults to escalate to destruction of the units: (1) insufficient isolation relay responsiveness, in that the protective relays did not trip quickly enough to interrupt the fault current before damage propagated; (2) inadequate semiconductor transient ratings, in that the IGBT components within the inverters were not rated for the transient conditions developed during the fault; (3) ineffective internal insulation, which allowed sustained ground-fault arcing once the fault had initiated. Field waveforms were reported to match laboratory-induced fault signatures. The cascade described was a DC-side short circuit, escalating to a multi-phase short circuit, then a sustained ground-fault arc, then semiconductor breakdown and destruction of the inverter.

  1. DC-side protection in utility-scale solar inverters must be treated as an explicit design requirement.
  2. Isolation relay response times should be specified and tested against realistic fault scenarios.
  3. Semiconductor transient ratings must cover DC-side fault transients that can exceed AC-side severity.
  4. Internal insulation must be designed and assessed for sustained arc conditions.

More lessons on electrical protection and isolation, from every incident on the register.

  • Inverter model and age
  • Number of units affected
  • Duration of downtime
  • Cost of the failures

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Published 2026-05-01. Written from public reporting. Descriptive, not investigative. See the data accuracy disclaimer.

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